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Linux Device Driver Development

Linux Device Driver Development

By : John Madieu
4.4 (7)
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Linux Device Driver Development

Linux Device Driver Development

4.4 (7)
By: John Madieu

Overview of this book

Linux is by far the most-used kernel on embedded systems. Thanks to its subsystems, the Linux kernel supports almost all of the application fields in the industrial world. This updated second edition of Linux Device Driver Development is a comprehensive introduction to the Linux kernel world and the different subsystems that it is made of, and will be useful for embedded developers from any discipline. You'll learn how to configure, tailor, and build the Linux kernel. Filled with real-world examples, the book covers each of the most-used subsystems in the embedded domains such as GPIO, direct memory access, interrupt management, and I2C/SPI device drivers. This book will show you how Linux abstracts each device from a hardware point of view and how a device is bound to its driver(s). You’ll also see how interrupts are propagated in the system as the book covers the interrupt processing mechanisms in-depth and describes every kernel structure and API involved. This new edition also addresses how not to write device drivers using user space libraries for GPIO clients, I2C, and SPI drivers. By the end of this Linux book, you’ll be able to write device drivers for most of the embedded devices out there.
Table of Contents (23 chapters)
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1
Section 1 -Linux Kernel Development Basics
6
Section 2 - Linux Kernel Platform Abstraction and Device Drivers
12
Section 3 - Making the Most out of Your Hardware
18
Section 4 - Misc Kernel Subsystems for the Embedded World

Working with I/O memory to talk to hardware

So far, we have dealt with main memory, and we used to think of memory in terms of RAM. That said, RAM one a peripheral among many others, and its memory range corresponds to its size. RAM is unique in the way it is entirely managed by the kernel, transparently for users. The RAM controller is connected to the CPU data/control/address buses, which it shares with other devices. These devices are referred to as memory-mapped devices because of their locality regarding those buses, and communication (input/output operations) with those devices is called memory-mapped I/O. These devices include controllers for various buses provided by the CPU (USB, UART, SPI, I2C, PCI, and SATA), but also IPs such as VPU, GPU, Image Processing Unit (IPU), and Secure Non-Volatile Store (SNVS, a feature in i.MX chips from NXP).

On a 32-bit system, the CPU has up to 232 choices of memory locations (from 0 to 0xFFFFFFFF). The thing is that not all those addresses...

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